Wide-bandgap (WBG) GaN power electronics reliability
Thermal reliability is a critical factor in ensuring the performance and efficiency of GaN-based electronic devices. In this paper, the fatigue life assessment of a laterally conducting GaN power package that uses a two-solder hierarchy of SAC305 and Sn63/Pb37 on a 120μm thick dielectric for device attach was conducted using an FEA. The double-sided package structure also introduced thick Cu as integrated baseplate layers for mechanical mounting into higher packaging levels while providing surfaces for double-sided cooling. The internal structure varied spacer thicknesses for planarization and inclusion of package-integrated decoupling capacitors. The solder materials were simulated by using the Anand viscoplastic constitutive model. Coffin-Manson, Engelmaier, and Solomon empirical strain-based models were utilized to predict the cyclic life of the package. Based on the results, the critical solder joint location was predicted in the Sn63/Pb37 solder layer between the GaN and Cu spacer, with a strain range of 0.02797. The worst-case life prediction for the module was 150 cycles using the Coffin-Manson model. (P. Zaghari, S. S. Sinha, J. E. Ryu, P. D. Franzon and D. C. Hopkins, “Thermal Cycling and Fatigue Life Analysis of a Laterally Conducting GaN-based Power Package,” 2023 IEEE International 3D Systems Integration Conference (3DIC), Cork, Ireland, 2023, pp. 1-5, doi: 10.1109/3DIC57175.2023.10154901.)
Lead-free BGA solder ball thermomechanical fatigue
The electronic industry is constantly advancing towards decreasing the volume and weight of electronic devices while incorporating greater functionality. These developments result in higher costs and greater susceptibility to failure, prioritizing the optimization of electronic package design. As electronic devices become more highly integrated, more electrical connections are required, and more heat is produced. Solder joints provide the electrical connections as well as some mechanical support in packages such as DIP (Dual Inline Packaging), BGA (Ball Grid Array), CSP (Chip Size Package), Flip Chip, and WLP (Wafer Level Package). As the device’s temperature fluctuates, these interconnections are repeatedly stressed and fatigued due to the different coefficients of thermal expansion (CTE) between the electronic package and the plastic circuit board (PCB). We are interested in designing for the reliability of the semiconductor packaging through computational simulation and modeling. We investigated the effect of microstructures in the solder ball during the thermomechanical cycles on fatigue fracture behaviors. (Reference: Seo, Eunice Y., and Jong E. Ryu. “Influence of reflow profile on thermal fatigue behaviors of solder ball joints.” Journal of Materials Engineering and Performance 29.6 (2020): 4095-4104.)
Moisture-induced delamination failure
Moisture-induced package failures such as interfacial delamination and pop-corn cracking are common failure phenomena during a solder reflow process in the semiconductor industry. The factors governing the moisture-induced package failure are mainly moisture content and adhesion strength of the interface at the elevated temperature during a solder reflow process. Therefore, it is important to understand and predict the interfacial adhesion strength as a function of levels of moisture content and temperature to improve the reliability of the package products.
In this work, moisture-induced interfacial delamination in a semiconductor package was investigated by both experiment and multi-scale numerical analysis techniques. The interfacial adhesion strength between a silicon wafer and an epoxy adhesive layer was characterized by a die-shear test with respect to moisture concentration and temperature. Molecular dynamics simulation was performed to study the effect of moisture and temperature on the interfacial adhesion energy and strength at the Si/epoxy adhesive interface at a molecular level. (Reference: Kim, Hak-Sung, Jeehyang Huh, and Jongeun Ryu. “Investigation of moisture-induced delamination failure in a semiconductor package via multi-scale mechanics.” Journal of Physics D: Applied Physics 44.3 (2010): 034007.)